Packaging technologies impose various physical constraints on bisection bandwidth and channel
width of a system whereas processor and interconnect technologies lead to certain throughput
and latency demands on the system performance. Earlier studies in literature have either focused
on only flat interconnections or proposed hierarchical/clustered interconnections with limited
packaging constraints. Pinout technologies and capacity of packaging modules have been ignored,
often leading to configurations which are not design-feasible. In this paper, we propose a new
supply-demand framework for multiprocessor system design by considering packaging, processor,
and interconnect technologies in an integrated manner. The elegance of this framework lies in its
parameterized representation of different technologies. For a given set of technological parameters
the framework derives the best configuration while considering practical design aspects like maximum
board area, maximum available pinout, fixed channel width, and scalability. In order to build
a scalable parallel system with a given number of processors, the framework explores the design
space of flat k-ary n-cube topologies and their clustered variations (k-ary n-cube cluster-c) to derive
design-feasible configurations with best system performance. The study identifies processor board
area, supported channel width, board pinout density, and router pinout as critical parameters and
analyzes their impact on deriving design-feasible and best configurations. For a wide range of
parameters, it is shown that best configurations are achieved with cluster-based systems with 2-8
processors per cluster and 3D-5D inter-cluster interconnection.